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Hardware Accelerators in Data Centers
Ebook Free Hardware Accelerators in Data Centers
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From the Back Cover
This book provides readers with an overview of the architectures, programming frameworks, and hardware accelerators for typical cloud computing applications in data centers. The authors present the most recent and promising solutions, using hardware accelerators to provide high throughput, reduced latency and higher energy efficiency compared to current servers based on commodity processors. Readers will benefit from state-of-the-art information regarding application requirements in contemporary data centers, computational complexity of typical tasks in cloud computing, and a programming framework for the efficient utilization of the hardware accelerators. Provides a single-source reference to the state of the art for hardware accelerators in data centers;Describes integrated frameworks for the seamless deployment of hardware accelerators;Includes several use-case scenarios of hardware accelerators for typical cloud computing applications, such as machine learning, graph computation, and databases.
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About the Author
Christoforos Kachris is a Senior Research Associate at Institute of Communication and Computer Systems (ICCS) - National Technical University of Athens (NTUA) and assistant Professor at Democritus University of Thrace. From 2016 till 2019 he was the Technical Project Manager of VINEYARD EC-funded project that envisioned the adoption of FPGAs in the data centers for cloud computing applications and the emerging market of acceleration-as-a-service. Christoforos received his Ph.D. in computer engineering in 2007 from the Technical University of Delft, The Netherlands in 2008 and the diploma and the M.Sc. in Electronic and Computer Engineering from the Technical University of Crete, Greece in 2001 and 2003 respectively. In 2006 he was a research intern at Xilinx Research Labs, San Jose, CA, working at the Networks Group. From 2009 till 2010 he was a visiting lecturer at University of Crete and a visiting researcher at FORTH where he coordinated the Interconnects cluster of High Performance Embedded Architectures and Compilers (HiPEAC). From 2010 till 2015 he was senior research associate at Athens Information Technology (AIT). He has more than 16 years of experience on development of hardware accelerators (FPGA, reconfigurable computing) and more than 8 years’ experience on technical project management of competitive European and National research projects (mainly for multi-million international European funder research projects). Babak Falsafi is a Professor in the Computer & Communication Sciences department at Ecole Polytechnique Federale de Lausanne (EPFL). He is the founding director of the EcoCloud research center targeting energy-efficient and environmentally friendly cloud technologies. His research interests are primarily centered around computer systems with emphasis on techniques for integration, specialization and approximation (ISA) to improve efficiency in datacenters, design for emerging technologies and design evaluation methodologies for servers. Dimitrios Soudris received his Diploma in Electrical Engineering from the University of Patras, Greece, in 1987. He received the Ph.D. Degree in Electrical Engineering, from the University of Patras in 1992. He was working as a Professor in Dept. of Electrical and Computer Engineering, Democritus University of Thrace for thirteen years since 1995. He is currently working as Associate Professor in School of Electrical and Computer Engineering, Dept. Computer Science of National Technical University of Athens, Greece. His research interests include embedded systems design, reconfigurable architectures, reliability and low power VLSI design. He has published more than 340 papers in international journals and conferences. Also, he is coauthor/coeditor in seven books of Kluwer and Springer. He is leader and principal investigator in numerous research projects funded from the Greek Government and Industry, European Commission (ESPRIT II-III-IV and 5th & 7th IST), ENIAC-JU and European Space Agency. He has served as General Chair and Program Chair for PATMOS 99 and 2000, respectively, General Chair of IFIP-VLSI-SOC 2008 and General Co-Chair of PARMA Workshop 2013. Also, he received an award from INTEL and IBM for the EU project LPGD 25256, awards in ASP-DAC 05 and VLSI 05 for EU AMDREL project IST-2001-34379.
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Product details
Hardcover: 279 pages
Publisher: Springer; 1st ed. 2019 edition (August 22, 2018)
Language: English
ISBN-10: 9783319927916
ISBN-13: 978-3319927916
ASIN: 3319927914
Product Dimensions:
6.1 x 0.7 x 9.2 inches
Shipping Weight: 1.2 pounds (View shipping rates and policies)
Average Customer Review:
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Amazon Best Sellers Rank:
#7,485,402 in Books (See Top 100 in Books)
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